Method for manufacturing N-type MOSFET
- 申请号:US201213878046
- 专利类型:US
- 申请(专利权)人:中国科学院微电子研究所
- 公开(公开)号:US9029225(B2)
- 公开(公开)日:2015.05.12
- 法律状态:
- 出售价格: 面议 立即咨询
专利详情
专利名称 | Method for manufacturing N-type MOSFET | ||
申请号 | US201213878046 | 专利类型 | US |
公开(公告)号 | US9029225(B2) | 公开(授权)日 | 2015.05.12 |
申请(专利权)人 | 中国科学院微电子研究所 | 发明(设计)人 | Xu Qiuxia;Zhu Huilong;Zhou Huajie;Xu Gaobo |
主分类号 | H01L21/336 | IPC主分类号 | H01L21/336;H01L21/28;H01L29/51;H01L29/49;H01L29/66 |
专利有效期 | Method for manufacturing N-type MOSFET 至Method for manufacturing N-type MOSFET | 法律状态 | |
说明书摘要 | The present disclosure discloses a method for manufacturing an N-type MOSFET, comprising: forming a part of the MOSFET on a semiconductor substrate, the part of the MOSFET comprising source/drain regions in the semiconductor substrate, a replacement gate stack between the source/drain regions above the semiconductor substrate, and a gate spacer surrounding the replacement gate stack; removing the replacement gate stack of the MOSFET to form a gate opening exposing a surface of the semiconductor substrate; forming an interface oxide layer on the exposed surface of the semiconductor; forming a high-K gate dielectric layer on the interface oxide layer in the gate opening; forming a first metal gate layer on the high-K gate dielectric layer; implanting dopant ions into the first metal gate layer; and performing annealing to cause the dopant ions to diffuse and accumulate at an upper interface between the high-K gate dielectric layer and the first metal gate layer and a lower interface between the high-K gate dielectric layer and the interface oxide layer, and also to generate electric dipoles by interfacial reaction at the lower interface between the high-K gate dielectric layer and the interface oxide layer. |
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