专利详情

专利名称	MOSFET formed on an SOI wafer with a back gate
申请号	US201113580053	专利类型	US
公开（公告）号	US8952453(B2)	公开（授权）日	2015.02.10
申请（专利权）人	中国科学院微电子研究所	发明（设计）人	Zhu Huilong;Liang Qingqing;Yin Haizhou;Luo Zhijiong
主分类号	H01L27/12	IPC主分类号	H01L27/12;H01L21/84;H01L29/66;H01L29/786
专利有效期	MOSFET formed on an SOI wafer with a back gate 至MOSFET formed on an SOI wafer with a back gate	法律状态
说明书摘要	The present application discloses a MOSFET and a method for manufacturing the same. The MOSFET is formed on an SOI wafer, comprising: a shallow trench isolation for defining an active region in the semiconductor layer; a gate stack on the semiconductor layer; a source region and a drain region in the semiconductor layer on both sides of the gate stack; a channel region in the semiconductor layer and sandwiched by the source region and the drain region; a back gate in the semiconductor substrate; a first dummy gate stack overlapping with a boundary between the semiconductor layer and the shallow trench isolation; and a second dummy gate stack on the shallow trench isolation, wherein the MOSFET further comprises a plurality of conductive vias which are disposed between the gate stack and the first dummy gate stack and electrically connected to the source region and the drain region respectively, and between the first dummy gate stack and the second dummy gate stack and electrically connected to the back gate. The MOSFET avoids short circuit between the back gate and the source/drain regions by the dummy gate stacks.