Method for forming gate structure, method for forming semiconductor device, and semiconductor device
- 申请号:US201213699734
- 专利类型:US
- 申请(专利权)人:中国科学院微电子研究所
- 公开(公开)号:US8921171(B2)
- 公开(公开)日:2014.12.30
- 法律状态:
- 出售价格: 面议 立即咨询
专利详情
专利名称 | Method for forming gate structure, method for forming semiconductor device, and semiconductor device | ||
申请号 | US201213699734 | 专利类型 | US |
公开(公告)号 | US8921171(B2) | 公开(授权)日 | 2014.12.30 |
申请(专利权)人 | 中国科学院微电子研究所 | 发明(设计)人 | Yang Hong;Ma Xueli;Wang Wenwu;Han Kai;Wang Xiaolei;Yin Huaxiang;Yan Jiang |
主分类号 | H01L21/8238 | IPC主分类号 | H01L21/8238;H01L27/092 |
专利有效期 | Method for forming gate structure, method for forming semiconductor device, and semiconductor device 至Method for forming gate structure, method for forming semiconductor device, and semiconductor device | 法律状态 | |
说明书摘要 | A method for forming a gate structure, comprising: providing a substrate, where the substrate includes a nMOSFET area and a pMOSFET area, each of the nMOSFET area and the pMOSFET area has a gate trench, and each of the gate trenches is provided at a bottom portion with a gate dielectric layer; forming a gate dielectric capping layer on the substrate; forming an etching stop layer on the gate dielectric capping layer; forming an oxygen scavenging element layer on the etching stop layer; forming a first work function adjustment layer on the oxygen scavenging element layer; etching the first work function adjustment layer above the nMOSFET area; forming a second work function adjustment layer on the surface of the substrate; metal layer depositing and annealing to fill the gate trenches with a metal layer; and removing the metal layer outside the gate trenches. |
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